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Adam Leventhal

๐Ÿ‘ค Speaker
2711 total appearances

Appearances Over Time

Podcast Appearances

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah, exactly.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Right. So yeah. So, so yeah, I think it's like, it's good that you have that consortium and you'll be able to push some stuff there. But I also feel like at the end of the day, you know, where you see a lot of value from Nvidia is that they are building, you know, where they've been successful because they have vertically integrated a whole lot of that stuff. Yes.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Right. So yeah. So, so yeah, I think it's like, it's good that you have that consortium and you'll be able to push some stuff there. But I also feel like at the end of the day, you know, where you see a lot of value from Nvidia is that they are building, you know, where they've been successful because they have vertically integrated a whole lot of that stuff. Yes.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah, I think actually we've been talking about PCIe a bit. So I actually think one of the things that I find has been both fun and sometimes a little vexing, but is ultimately good for the platform, not always as fun for us in how the register numbers sort themselves out, is that they've actually increased the number of IOMS entries in there.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah, I think actually we've been talking about PCIe a bit. So I actually think one of the things that I find has been both fun and sometimes a little vexing, but is ultimately good for the platform, not always as fun for us in how the register numbers sort themselves out, is that they've actually increased the number of IOMS entries in there.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

So basically in the past where you had a group of 32 PCIe lanes, which are basically two X16 cores, They were consolidated into one connection to the data fabric. Actually, one of the more interesting things is that we've seen that in Turin, each X16 group is connected to the data fabric independently through its own kind of IOMS slash IOHC, which are all, I guess, internal data items.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

So basically in the past where you had a group of 32 PCIe lanes, which are basically two X16 cores, They were consolidated into one connection to the data fabric. Actually, one of the more interesting things is that we've seen that in Turin, each X16 group is connected to the data fabric independently through its own kind of IOMS slash IOHC, which are all, I guess, internal data items.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Or those are core-ish? I mean... Yeah, I don't know how much. I'm sure there's a Z80 hidden in everything, or an 8051. So I'm sure everything's a core at the end of the day. But actually, if you just kind of look at it, this part is less hidden. Because if you just look at, hey, show me the PCI devices on Turin, you'll see, hey, there's eight AMD root complexes where there used to be four.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Or those are core-ish? I mean... Yeah, I don't know how much. I'm sure there's a Z80 hidden in everything, or an 8051. So I'm sure everything's a core at the end of the day. But actually, if you just kind of look at it, this part is less hidden. Because if you just look at, hey, show me the PCI devices on Turin, you'll see, hey, there's eight AMD root complexes where there used to be four.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah, that would be my theory is that basically it's getting you more because there's more data fabric ports that you can have just more transactions in flight to different groups of devices.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah, that would be my theory is that basically it's getting you more because there's more data fabric ports that you can have just more transactions in flight to different groups of devices.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah, yeah, that's definitely it. Otherwise, it's Milan to Genoa was more. There are more changes than Genoa to Turin. Interesting. In kind of some of the lower level stuff. Some of these kind of bits like how do you do PCIe initialization, hot plug have stayed more the same. From Genoa. From kind of Genoa to Turin. Yeah. They have some different firmware blobs that you talk to. So like...

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah, yeah, that's definitely it. Otherwise, it's Milan to Genoa was more. There are more changes than Genoa to Turin. Interesting. In kind of some of the lower level stuff. Some of these kind of bits like how do you do PCIe initialization, hot plug have stayed more the same. From Genoa. From kind of Genoa to Turin. Yeah. They have some different firmware blobs that you talk to. So like...

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

The SMU interfaces stay the same across these, but they moved to a new what they call MPIO framework, which is what goes and programs the DXIO crossbar. PCIe device training is kind of a collaborative effort between that core and X86 cores.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

The SMU interfaces stay the same across these, but they moved to a new what they call MPIO framework, which is what goes and programs the DXIO crossbar. PCIe device training is kind of a collaborative effort between that core and X86 cores.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah. So there's, there's two different pieces here. So if you see AMD, first off, when they sell, you know, in their, all their makers say, Hey, we've got 128 PCIe lanes, which is great. Uh, But the first thing you have to figure out is, well, actually, how do those work on the board? I've got, are these X16 slots? Are they X4 slots that are actually connected to an SSD?

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Yeah. So there's, there's two different pieces here. So if you see AMD, first off, when they sell, you know, in their, all their makers say, Hey, we've got 128 PCIe lanes, which is great. Uh, But the first thing you have to figure out is, well, actually, how do those work on the board? I've got, are these X16 slots? Are they X4 slots that are actually connected to an SSD?

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

What's their size and width, and how do they actually fit across the board? So one of the first things that everyone has to do is they kind of will tell the AMD's firmware, hey, here's how this is actually connected. you know, these logical, these physical fives, you know, I've got an X 16 slot. I've got, you know, in our case, we've got 10, uh, X four slots for basically every front facing you.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

What's their size and width, and how do they actually fit across the board? So one of the first things that everyone has to do is they kind of will tell the AMD's firmware, hey, here's how this is actually connected. you know, these logical, these physical fives, you know, I've got an X 16 slot. I've got, you know, in our case, we've got 10, uh, X four slots for basically every front facing you.

Oxide and Friends
Unshrouding Turin (or Benvenuto a Torino)

Dot two, right. You know, an X 16 slot for a Nick. Um, you'll have other things for other folks. Or if you have a kind of like a board, like showed up in the chat, you know, you've got some number of X 16 slots that map to things, some, some probably M dot two slot. So you have to tell it what is all, you know, what all is there.