John Siracusa

You can have all sorts of stuff that makes it take up more room on the chip and more power and more transistors and more parts that makes it a power core.

And then the efficiency cores, they have less of that stuff.

They take up less room.

They take up less power.

But the question always is for a given workload,

when you're sending something through like a power core, what if you're not, don't have that many floating point multiplications?

Those extra floating point multiplication units are just sitting there not being used because most of the workloads you're doing aren't doing lots of floating point stuff.

So they're not doing anything useful.

And at that point, if you had sent that same load through a quote unquote efficiency core, it would have been just as fast or maybe even faster, but maybe the pipeline is shallower or something like that, right?

So you never quite know what the trade-offs are of like,

Should I send this to the bigger core and waste time running through that machinery if it's not going to take advantage of most of the stuff that's there?

And what it looks to me like is in the M5 Pro, and we'll see in the M5 Max as well, I think what they did is made the smaller cores...

bigger enough so that it makes more sense to have twice as many of them as the power cores.

Before it was twice as many of the big cores as the little.

Now it's twice as many of the little as the big.

And I think the way they did that, and we'll have to wait for a die shot to see if this theory bears out, is that they made the little cores big enough to essentially be the best choice for almost everything you do and only really, really specialize the bigger cores.

for jobs that are actually going to use all the machinery they have, that need the more sophisticated branch prediction, that need the deeper pipeline, that need the extra execution units, that need the more L1 cache.

And there's five of them.

It's not like there's just one of them or something.

There's five of them.