Adam Leventhal

So we, we first are writing the spine or which actually goes much faster.

That part is quick. But then we basically, instead of sending the full M dot two image that we would boot from, which would be like a gig and basically be, you know, an eternity in that world. We have a slimmed down, basically kind of phase two image. So unlike a traditional BIOS where you're basically splitting up, you know, the BIOS is in your spy flash.

That part is quick. But then we basically, instead of sending the full M dot two image that we would boot from, which would be like a gig and basically be, you know, an eternity in that world. We have a slimmed down, basically kind of phase two image. So unlike a traditional BIOS where you're basically splitting up, you know, the BIOS is in your spy flash.

It's, it, it sits there and then kind of goes and pretends to reset the world back into 1970 after waking up and changing everything and, you know, turning on all the CPUs so it can turn them off again. Um, you know, we basically have a continuous operating system image. So basically, but we just kind of say, Hey, you find it half your like Ram disk, half your modules somewhere else.

It's, it, it sits there and then kind of goes and pretends to reset the world back into 1970 after waking up and changing everything and, you know, turning on all the CPUs so it can turn them off again. Um, you know, we basically have a continuous operating system image. So basically, but we just kind of say, Hey, you find it half your like Ram disk, half your modules somewhere else.

So, um, we end up when we end up doing the recovery, we end up sending kind of a like slim down, just, just, you know, a measly a hundred megabytes over this, this small link. Um,

So, um, we end up when we end up doing the recovery, we end up sending kind of a like slim down, just, just, you know, a measly a hundred megabytes over this, this small link. Um,

Yep. Yeah, so we're excited to see how all that kind of starts to change. I mean, there's a recent... I dropped a link in there. I think they did this at OSFC. They talked about how they're going to have OpenSeal kind of be the mainstay more so for Venice. Yes. And so I think, you know, from our perspective, this is all good. It kind of gets us out there. We can start to point to things that...

Yep. Yeah, so we're excited to see how all that kind of starts to change. I mean, there's a recent... I dropped a link in there. I think they did this at OSFC. They talked about how they're going to have OpenSeal kind of be the mainstay more so for Venice. Yes. And so I think, you know, from our perspective, this is all good. It kind of gets us out there. We can start to point to things that...

you know, are in open cell and ends up being a, a win for, uh, uh, for everyone. So I think it's, it's basically, it's excited. We're, we're excited to see it. Parts of it. Um, you know, we may be able to leverage directly, but if not, you know, we can be inspired by it. They can be inspired by us and vice versa.

you know, are in open cell and ends up being a, a win for, uh, uh, for everyone. So I think it's, it's basically, it's excited. We're, we're excited to see it. Parts of it. Um, you know, we may be able to leverage directly, but if not, you know, we can be inspired by it. They can be inspired by us and vice versa.

I mean, I still think the best bit for me is in SP3 where the SMU to do hot plug, it speaks over I2C. And I'm pretty sure it, the smooth itself does not reset the I squared C peripheral to run at a hundred kilohertz.

I mean, I still think the best bit for me is in SP3 where the SMU to do hot plug, it speaks over I2C. And I'm pretty sure it, the smooth itself does not reset the I squared C peripheral to run at a hundred kilohertz.

When the, when the I squared C peripheral restarts, it starts in basically fast mode plus, which is this weird push pull mode at like faster than 101 megahertz, which basically means it don't work. Yeah. And the only there was definitely no explicit initialization.

When the, when the I squared C peripheral restarts, it starts in basically fast mode plus, which is this weird push pull mode at like faster than 101 megahertz, which basically means it don't work. Yeah. And the only there was definitely no explicit initialization.

It's just that, hey, this Dixie module in a, you know, dependent on this Dixie, which probably just did a generic blanket I squared C initialization, which changed, you know, which reset everything to 100 kilohertz.

It's just that, hey, this Dixie module in a, you know, dependent on this Dixie, which probably just did a generic blanket I squared C initialization, which changed, you know, which reset everything to 100 kilohertz.

Yeah, so the big... So I think to help understand making the trade-off for DDR5, you kind of have to go back to DDR4. So when you have two DIMMs per channel, the way it works is that kind of in the channel, or you go back even further in time, you'll actually find platforms with three DIMMs per channel. you basically are daisy chaining the channel.

Yeah, so the big... So I think to help understand making the trade-off for DDR5, you kind of have to go back to DDR4. So when you have two DIMMs per channel, the way it works is that kind of in the channel, or you go back even further in time, you'll actually find platforms with three DIMMs per channel. you basically are daisy chaining the channel.

So the traces will literally go up to the first dim, then continue on to the second dim or to the third dim in those platforms. So just the presence of that second, of having two dims on there sometimes changes the SI. In DDR4, it often didn't. So if you only had one dim populate, you could still get the maximum memory speed. possible.