Robert Mustacchi

And on a normal PCI card, this is a little jumper that's there for the factory, done once, and then you update this, you can update the firmware from the NIC while it's live, but...

And on a normal PCI card, this is a little jumper that's there for the factory, done once, and then you update this, you can update the firmware from the NIC while it's live, but...

It also sells the factory, the egg problem, like how do you get the initial version on there? It's just like, there never, it doesn't matter if there ever was something there or not. We just always put what we think should be there.

It also sells the factory, the egg problem, like how do you get the initial version on there? It's just like, there never, it doesn't matter if there ever was something there or not. We just always put what we think should be there.

And it definitely simplified the, you know, we talk about hardware software co-design. This definitely simplified the electrical design, um, Definitely, the last thing you want are more spy muxes and other things in the way, dealing with voltage translation, dealing with questions of even which spy... port would we have to connect it to, you know, on what device, what way would data flow?

And it definitely simplified the, you know, we talk about hardware software co-design. This definitely simplified the electrical design, um, Definitely, the last thing you want are more spy muxes and other things in the way, dealing with voltage translation, dealing with questions of even which spy... port would we have to connect it to, you know, on what device, what way would data flow?

So it really simplified a lot of stuff, which was.

So it really simplified a lot of stuff, which was.

we want to sorry just to underscore the importance of this yeah it's i mean we have a team that can has gotten it right time and time again but also um you know say when people joke you know the best software is the code you didn't write no bugs in the code you didn't write you know there's no electrical problems in the if you don't put those things down so um and sometimes they're necessary but you know if you can get away with it makes it a lot smoother so anyways um

we want to sorry just to underscore the importance of this yeah it's i mean we have a team that can has gotten it right time and time again but also um you know say when people joke you know the best software is the code you didn't write no bugs in the code you didn't write you know there's no electrical problems in the if you don't put those things down so um and sometimes they're necessary but you know if you can get away with it makes it a lot smoother so anyways um

All that said, the way that this kind of whole problem is that the mask ROM starts up in PCIe Gen 2. It's basically hard-coded in silicon to start as a Gen 2 by 8 device, as opposed to a Gen 3 by 16. And we had occasionally seen some failures.

All that said, the way that this kind of whole problem is that the mask ROM starts up in PCIe Gen 2. It's basically hard-coded in silicon to start as a Gen 2 by 8 device, as opposed to a Gen 3 by 16. And we had occasionally seen some failures.

And I think it was really Josh Glula who insisted we kind of do some of this boot loop testing where we'd occasionally see devices that had a surprisingly occasional failure to train the device in manufacturing mode. And if we came back to it later and tried to restart things or took another lap, it would often work. Or even if you tried to reset it after that, it would come up just fine.

And I think it was really Josh Glula who insisted we kind of do some of this boot loop testing where we'd occasionally see devices that had a surprisingly occasional failure to train the device in manufacturing mode. And if we came back to it later and tried to restart things or took another lap, it would often work. Or even if you tried to reset it after that, it would come up just fine.

But the first time on a cold boot, it wouldn't turn on.

But the first time on a cold boot, it wouldn't turn on.

Yeah, so that's a great question. So what we think of this is, so there's a complex state machine in the PCI docs. So basically, a PCI device goes through to basically have a PCIe link come up. So when your operating system wants to go read or write from a register that ultimately gets transformed into a transaction on the PCIe bus, which is a point-to-point link between a port on the CPU

Yeah, so that's a great question. So what we think of this is, so there's a complex state machine in the PCI docs. So basically, a PCI device goes through to basically have a PCIe link come up. So when your operating system wants to go read or write from a register that ultimately gets transformed into a transaction on the PCIe bus, which is a point-to-point link between a port on the CPU

and the downstream device, so the NIC in our case. You may have switches or other things in more complex designs, but really you can think of PCIe as a bunch of point-to-point links, generally between something on your CPU, which they may call the root port or an upstream port, and a device, often called the downstream port.

and the downstream device, so the NIC in our case. You may have switches or other things in more complex designs, but really you can think of PCIe as a bunch of point-to-point links, generally between something on your CPU, which they may call the root port or an upstream port, and a device, often called the downstream port.