Robert Mustacchi

It has basically a ring buffer of the last... 30-ish state transitions it's performed. So we can figure out what has it been doing, what has it seen as kind of a guide, and you can compare that against the PCIe spec, and there's more or less a one-to-one correspondence between those states and

It has basically a ring buffer of the last... 30-ish state transitions it's performed. So we can figure out what has it been doing, what has it seen as kind of a guide, and you can compare that against the PCIe spec, and there's more or less a one-to-one correspondence between those states and

Asterisks. Right. Sorry. So anyone can read this. That is, whether you're in Holistic Boot or in the Oxide architecture or just running a Lumos in general on Linux or other systems, you can actually read from the system management network. Now, knowing what to read and what maps to what can be a little more challenging because the big gotcha, as we said earlier, is that the CPU is flexible.

Asterisks. Right. Sorry. So anyone can read this. That is, whether you're in Holistic Boot or in the Oxide architecture or just running a Lumos in general on Linux or other systems, you can actually read from the system management network. Now, knowing what to read and what maps to what can be a little more challenging because the big gotcha, as we said earlier, is that the CPU is flexible.

So it has 128 lanes. And there's a mapping, when you talk to that firmware, between some of those lanes and what underlying hardware

So it has 128 lanes. And there's a mapping, when you talk to that firmware, between some of those lanes and what underlying hardware

It's just certainly a lot faster when we have a data structure that tells us this is what it is for this. This device, which should have the T6, read all these registers. It's certainly a lot simpler and certainly a lot easier because we also integrated a bunch of register grabbing initially into the actual boot and training path itself.

It's just certainly a lot faster when we have a data structure that tells us this is what it is for this. This device, which should have the T6, read all these registers. It's certainly a lot simpler and certainly a lot easier because we also integrated a bunch of register grabbing initially into the actual boot and training path itself.

So we could actually just, on a debug build, for example, we'll just automatically collect a whole bunch of different registers from the PCIe core and the PCIe port, which corresponds to the root port, just by default. And so certainly that is where this is a lot easier because that's not as straightforward to do outside of building it really into the system itself.

So we could actually just, on a debug build, for example, we'll just automatically collect a whole bunch of different registers from the PCIe core and the PCIe port, which corresponds to the root port, just by default. And so certainly that is where this is a lot easier because that's not as straightforward to do outside of building it really into the system itself.

Well, yeah. So that, that we were able to eventually kind of first do that first kind of bifurcation and say, okay, the device is always coming out of reset. Um, then, um, you know, then we can go through and figure out, um,

Well, yeah. So that, that we were able to eventually kind of first do that first kind of bifurcation and say, okay, the device is always coming out of reset. Um, then, um, you know, then we can go through and figure out, um,

know why because basically we no longer have to go look at the we had a lot of electrical questions but uh that ruled out a whole huge class and uh uh i guess nathaniel's thankful was back in my court a little bit um but uh but yeah so then we started looking at this and you know we had um this uh boot loop stuff that Josh had put together.

know why because basically we no longer have to go look at the we had a lot of electrical questions but uh that ruled out a whole huge class and uh uh i guess nathaniel's thankful was back in my court a little bit um but uh but yeah so then we started looking at this and you know we had um this uh boot loop stuff that Josh had put together.

And we had a modified version that was grabbing out some of this register state at every loop. And actually, Andy had actually already gone through and analyzed a bunch of it prior to me coming back to this problem when I was coming back from being out for a little bit.

And we had a modified version that was grabbing out some of this register state at every loop. And actually, Andy had actually already gone through and analyzed a bunch of it prior to me coming back to this problem when I was coming back from being out for a little bit.

So once we kind of had the sense of that these were all here, these were all very similar, and they were all ending in a similar state, it got us, it was pretty suspicious because what we actually saw, and so to understand how PCIe works, you always train a PCIe device to Gen 1, no matter what. Then from there, you're going to go to different speeds.

So once we kind of had the sense of that these were all here, these were all very similar, and they were all ending in a similar state, it got us, it was pretty suspicious because what we actually saw, and so to understand how PCIe works, you always train a PCIe device to Gen 1, no matter what. Then from there, you're going to go to different speeds.

And basically, as part of the Gen 1 negotiation, you're saying what else you can support. And then the device will go and go to these higher speeds. 2 versus 3 is very different. And then 3, 4, 5 are kind of a different path. But we'd see that we basically got to Gen 2. We just successfully trained to Gen 1. We would go down the upgrade path to Gen 2. We would think we got to Gen 2. And then...

And basically, as part of the Gen 1 negotiation, you're saying what else you can support. And then the device will go and go to these higher speeds. 2 versus 3 is very different. And then 3, 4, 5 are kind of a different path. But we'd see that we basically got to Gen 2. We just successfully trained to Gen 1. We would go down the upgrade path to Gen 2. We would think we got to Gen 2. And then...