Gavin Uberti

speaker

403 appearances 1 recordings 1 series first heard Jun 2026 last heard 30 Jun

Gavin Uberti’s voice in public audio — every appearance, attributed to the second.

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Recordings per month over the last 12 months — 1 in all, peaking in Jun 2026 with 1.

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We think about it from how will the model use these tools more than we think about how will humans use these tools.

I think this comes down to economies of scale again.

At certain parts of the stack, there are huge economies of scale, and others there aren't.

For example, on designing models, huge economies of scale there.

For chip fabrication, same story.

But for example, if you think about building some small metal part inside of that rack, there's not that same effect.

We think the natural boundaries are on the chip side, on the bottom, and the model layer at the top.

Look at the raw flop stats.

You compare any of these chips built by the labs or by the hyperscalers, the flop density for say FBA times FBA is lower than the Blackwell B300.

And that makes sense because they don't have to take the risk.

They just have to go and build a similar enough product and not pay the NVIDIA tax.

We built this massive, massive FPGA cluster to go out and verify the full chip workdases.

And FPGAs are digital entities.

You can go test digital logic, but not analog logic.

And it turns out that when the chip came back, we began to go see issues in our retention application of incorrect results.

And we realized, wait a minute, there's a problem with the back-pressuring logic across a clock domain crossing is failing.

And this is going to cause the chip to produce wrong results.

And it is very, very hard to solve.

We realized there was one and only one way to solve it, as we had to line up two clock signals on our chip to within 50 picoseconds.

That is literally 50 trillionths of a second.

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